James N. Constant appeals a final decision of the United States Patent and Trademark Office Board of Patent Appeals and Interferences (“Board”) affirming an examiner’s rejection of all of the pending claims in Constant’s patent application as being obvious over the cited prior art under 35 U.S.C. § 103(a), and as lacking an adequate written description and relying on a nonenabling disclosure under 35 U.S.C. § 12, paragraph 1. Ex parte Constant, Paper No. 41 (B.P.A.I. Mar. 14, 2001), affd on reh’g, Ex parte Constant, Paper No. 43 (B.P.A.I. May 23, 2001). Because the Board’s findings on the obviousness issue are supported by substantial evidence, we affirm the final rejection of all of the pending claims, namely, claims 1-7,11-18, 20-24, and 33-35.
I.
Constant has been a party in a number of cases that have come before this court and once again comes before us with yet another variation of an argument that has already been rejected. In In re Constant, No. 01-1125 (Fed.Cir. May 10, 2001), Constant argued that the placement of a DSP using RAM on a single semiconductor chip or on multiple semiconductor chips is novel. We rejected that argument, noting that the issue had previously been decided. Id. at 3. We also advised Constant that the court looks with disfavor on the reassertion of failed arguments. The court once again expresses its disfavor of Constant’s actions and cautions appellant that continued repetition of failed arguments risks an inquiry as to frivolousness and the consequences attendant thereto. See, Fed. RApp. P. 38.
II.
All of the claims now pending in the application, namely, claims 1-7, 11-18, 20-24, and 33-35, stand rejected under 35 U.S.C. § 103(a) as being unpatentable over Rittenbach in view of Kobayashi and Springer. In this appeal, much as in prior appeals, Constant again argues that the placement of a digital signal processor (“DSP”) using RAM circuitry for time compression on a single semiconductor chip or on multiple semiconductor chips is patentable over the cited prior art. Constant contends that in assessing the patentability of his claims, the Board did not properly consider each of the Graham factors and, thus, erred in its affirmance of the examiner’s rejections on obviousness.
The Board found that: (1) Rittenbach discloses a time compressor or expander that includes a shift register as a memory device; (2) Kobayashi discloses a time compressor or expander that uses RAM circuits for memory; and (3) Springer suggests using a RAM in lieu of a shift register as a memory device because of its high *717speed, small size, and low power characteristics. The Board held that:
Since placing of various electronic elements on a single semiconductor chip was known and the desire of artisans to minimize, integrate and make semiconductor circuits more efficient was well known, the artisan clearly would have been led, from the knowledge of placing circuit components on a single semiconductor chip, to place the combination of claimed elements on such a single semiconductor chip.
The ultimate determination of whether an invention would have been obvious under 35 U.S.C. § 103(a) is a legal conclusion based on underlying findings of fact. In re Kotzab, 217 F.3d 1365, 1369, 55 USPQ2d 1313, 1316 (Fed.Cir.2000). We review the Board’s ultimate determination of obviousness de novo. Id. However, we review the Board’s underlying factual inquiries for substantial evidence. In re Gartside, 203 F.3d 1305, 1316, 53 USPQ2d 1769, 1776 (Fed.Cir.2000). Underlying factual inquiries include the scope and content of the prior art, the level of ordinary skill in the art, the differences between the claimed invention and the prior art, and other objective evidence of nonobviousness. See Graham v. John Deere Co., 383 U.S. 1, 17-18, 86 S.Ct. 684, 15 L.Ed.2d 545, 148 USPQ 459, 467 (1966). If the differences between a claimed invention and the prior art, “are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art,” the claimed invention is not patentable. 35 U.S.C. § 103 (1994); see also Graham, 383 U.S. at 13, 86 S.Ct. 684, 15 L.Ed.2d 545, 148 USPQ at 465.
Substantial evidence in the record supports the Board’s rejection of Constant’s claims for obviousness. Rittenbach discloses all of the limitations of the claimed invention with two exceptions. The first exception is that Rittenbach uses conventional shift registers rather than RAM as memory in a DSP. The other exception is that Rittenbach does not specifically teach the placement of a DSP device on a single chip or on multiple chips.
Both limitations missing from Rittenbach are taught by the remaining two references relied on by the examiner and by the admitted prior art. The first missing limitation, the replacement of shift registers with RAM, is described by Kobayashi and taught by Springer. Kobayashi discloses the use of RAM as a time compression DSP device. Springer teaches the advantage of substituting RAMs for shift registers in various DSP devices. Springer further suggests that the benefits of speed, small size, and decreased power needs may be achieved by replacing relatively slow operating shift registers with high-speed RAMs. The Board found that it would have been obvious to a DSP designer to substitute the conventional shift register memory of Rittenbach with the RAM memory of Kobayashi as motivated by the teaching of Springer. We see no error in the Board’s analysis.
As to the second limitation missing from Rittenbach, the placing of a DSP on a single chip, Constant has admitted in the specification of the application under review that such structure was well known in the art at the time of his invention. A review of Kobayashi and Springer shows that skilled artisans not only had the knowledge to place the device circuitry on a single chip, but they also had the motivation to do so. Springer further demonstrates that the motivation was driven by a desire of designers to make semiconductors more efficient by minimization and integration. Because designers had both the knowledge and the motivation, the Board found that it would have been obvi*718ous to place the claimed DSP device on a single integrated chip or on multiple chips.
We find no shortcomings in the Board’s assessment of the Graham factors and consider the Board’s findings as to the section 103(a) rejection to be supported by substantial evidence. We therefore affirm the obviousness rejection as a matter of law.
III.
In light of our affirmance of the rejection of all of the pending claims under 35 U.S.C. § 103(a), we decline to reach the rejections under 35 U.S.C. § 112, paragraph 1.
IV.
Constant refers to the standard of our review of appeals from the PTO as recited in the Administrative Procedure Act (“APA”), 5 U.S.C. § 706, and contends that under the APA we must review the “whole record,” meaning that we must answer a host of abstract questions not considered by the Board and posited anew in Constant’s brief to this court. 5 U.S.C. § 706 (2000). The APA’s directive that the court “shall review the whole record or those parts of it cited by a party” does not require the court to look for additional grounds for relief beyond those considered by the Board or to answer peripheral questions raised for the first time on appeal. Rather, our review of the “whole record” simply requires that we look at all of the evidence before us, not just the evidence supporting the Board’s findings on the issues presented. Thus, we review the parts of the record that both support and detract from the Board’s decision. See, e.g., Universal Camera Corp. v. NLRB, 340 U.S. 474, 487-88, 71 S.Ct. 456, 95 L.Ed. 456 (1951) (“considering] the whole record” means that a court must also take into account whatever in the record fairly detracts from the weight of the evidence supporting the administrative decision). Nothing in the APA suggests or obligates the court to answer abstract questions or to examine the record beyond the issues ruled on by the Board and properly presented to the court for review.