Nazomi Communications, Inc. v. Arm Holdings, Plc

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United States Court of Appeals for the Federal Circuit

04-1101

NAZOMI COMMUNICATIONS, INC.,

Plaintiff-Appellant,

v.

ARM HOLDINGS, PLC,
ARM LIMITED, and ARM, INC.,

Defendants-Appellees.

Thomas J. Friel, Jr., Cooley Godward LLP, of Palo Alto, California, argued for
plaintiff-appellant. With him on the brief were Brandon D. Baum, Lori R.E. Ploeger, and
Bernard C. Shek.

Robert P. Taylor, Howrey Simon Arnold & White, LLP, of Menlo Park, California,
argued for defendants-appellees. With him on the brief were Andrew Y. Piatnicia and
Ethan B. Andelman.

Appealed from: United States District Court for the Northern District of California

Judge Jeremy Fogel
 United States Court of Appeals for the Federal Circuit
04-1101

NAZOMI COMMUNICATIONS, INC.,

Plaintiff-Appellant,

v.

ARM HOLDINGS, PLC,
ARM LIMITED, and ARM, INC.,

Defendants-Appellees.

___________________________

DECIDED: April 11, 2005
___________________________

Before MICHEL*, Chief Judge, RADER, and PROST, Circuit Judges.

RADER, Circuit Judge.

The United States District Court for the Northern District of California

granted partial summary judgment in favor of ARM Holdings, PLC, ARM Limited,

and ARM, Inc. (collectively ARM), finding that ARM’s accused product did not

infringe Nazomi Communications, Inc.’s (Nazomi’s) U.S. Patent No. 6,332,215

(the ’215 patent). Nazomi Communications, Inc. v. Arm Holdings, PLC, No. C

02-02521 (N.D. Cal. Sept. 30, 2003). Because the district court did not construe

the disputed claim term in sufficient detail for appellate review, this court vacates

and remands.

*
Paul R. Michel assumed the position of Chief Judge on December 25, 2004.
 I.

The ’215 patent generally claims “a Java hardware accelerator which can

be used to quickly translate Java bytecodes into native instructions for a central

processing unit (CPU).” ’215 patent, col. 2, ll. 3-6. In computer programming, a

series of translations occurs between what is written by a human programmer,

and the program that is actually executed by the computer hardware. This

appeal focuses on one of these translations, described below.

Sun Microsystems developed a programming language called Java. ’215

patent, col. 1, ll. 5-10. In the Java environment, a programmer writes source

code in the Java language. This source code is then compiled into Java

bytecodes, “instructions that look like machine code, but aren’t specific to any

processor.” Id., col. 1, ll. 26-28. All types of processors can recognize Java

bytecodes if appropriate bytecode interpreters are provided.

Two types of memory organization are used to store information in

computers. Stack-based memories store information on a last-in, first-out basis.

This approach is analogous to a stack of papers in an inbox. To access a paper

at the bottom of the stack, a reader must first remove all of the papers above it.

Register-based memories, on the other hand, store and retrieve data according

to the exact location of each data item, much like an arrangement of post office

boxes. Under the analogy, the reader simply identifies and finds the “box” that

contains the desired data, which can be instantly retrieved. Java bytecodes are

written for computers that use a “stack-based” approach, whereas most modern

processors use a “register-based” approach. Translation of Java bytecodes into

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a form usable by register-based processors requires translation of Java

bytecodes into the “native instructions” of a register-based processor.

In a given machine, either hardware, software, or a combination of the two

may perform the translation from stack-based to register-based instructions. One

prior art solution for this problem used only software, a Java Virtual Machine

(JVM), to perform the translation. JVMs, however, add processing steps and

reduce overall execution speed. Seeking to minimize these disadvantages in the

prior art, the ’215 patent discloses a hardware Java accelerator that translates

stack-based Java bytecode instructions into register-based “native” instructions

that are usable by a register-based processor.

Of the asserted claims, claim 1 is representative:

A system comprising:

a central processing unit having a register file, the central
processing unit adapted to execute register-based instructions; and
a hardware unit associated with the central processing unit, the
hardware unit adapted to convert stack-based instructions into
register-based instructions, wherein a portion of the operand stack
is stored in the register file of the central processing unit and
wherein the hardware unit is adapted to produce at least one of
overflow or underflow indications for the portion of the operand
stack stored in the register file, wherein the hardware unit is
adapted to swap parts of the operand stack in and out of the
register file from a memory, the system including an indication of
the depth of the portion of operand stack, wherein a[n] overflow or
underflow produces an operand transfer between the register file in
the central processing unit and memory.

Id., col. 7, ll. 24-41 (emphasis added).

In the proceedings below, the parties disputed the meaning of the term

“instruction.” Nazomi proposed a broad definition of “instruction” as a command

that specifies or causes performance of an operation or function. ARM more

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 narrowly proposed, inter alia, that an “instruction” is “provided to the processor at

its input and thus must be recognizable to the decoder.” ARM further made a

distinction between “instructions” and “control signals” which, it asserted, are the

signals generated by the processor’s decoder that control downstream hardware.

Although not fully persuaded by ARM’s narrow proposal for “instruction,”

the district court nevertheless construed “the terms of the patent claims as calling

for a hardware unit or subunit that converts stack-based instructions into the

register-based instructions prior to the processing of those instructions by the

processor in the so-called ‘decode stage.’” Nazomi, slip op. at 6 (emphasis

added). Without analyzing the accused product in the light of this construction,

the district court reached the conclusion that ARM’s accused device did not

infringe the ’215 patent either literally or under the doctrine of equivalents.1 Id.,

slip op. at 7.

II.

Here, the district court found that, based upon its claim construction, there

could be no genuine issue that ARM’s product did not infringe the ’215 patent,

and granted summary judgment. This court reviews grants of summary judgment

without deference. Conroy v. Reebok Int’l Ltd., 14 F.3d 1570, 1575 (Fed. Cir.

1994). A summary judgment motion is proper if there are no genuine issues of

material fact, while viewing the facts in a light most favorable to the non-moving

party. See Fed. R. Civ. P. 56(c); Celotex Corp. v. Catrett, 477 U.S. 317, 322

1
Nazomi accused both Revision 2 and Revision 3 ARM processors of
infringement. The parties’ summary judgment motions addressed only
Revision 3. Thus, Revision 3, or “Jazelle,” is the only device implicated on
appeal.

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(1986). A finding of infringement, whether literal or by equivalents, is a question

of fact. Bai v. L&L Wings, Inc., 160 F.3d 1350, 1353 (Fed. Cir. 1998). The

district court’s claim construction, a matter of law on appeal, receives no

deference from this court. Cybor Corp. v. FAS Techs., Inc., 138 F.3d 1448, 1454

(Fed. Cir. 1998) (en banc).

Infringement is a two-step inquiry, in which a court must first construe

disputed claim terms, and then compare the properly construed claims to the

accused device. Cybor Corp., 138 F.3d at 1454. The patent’s intrinsic record is

the primary tool to supply the context for interpretation of disputed claim terms.

Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996). This

tool usually provides the technological and temporal context to enable the court

to ascertain the meaning of the claim to one of ordinary skill in the art at the time

of invention. Moba v. Diamond Automation, Inc., 325 F.3d 1306, 1315 (Fed. Cir.

2003) (“Moreover, as this court has repeatedly counseled, the best indicator of

claim meaning is its usage in context as understood by one of skill in the art at

the time of invention.”). In most cases, the best source for discerning this proper

context is the patent specification, wherein the patent applicant describes the

invention. Metabolite Labs., Inc. v. Lab. Corp. of Am. Holdings, 370 F.3d 1354,

1360 (Fed. Cir. 2004). If necessary, courts may also look to extrinsic evidence,

often presented in the form of expert testimony. Pitney Bowes, Inc. v. Hewlett-

Packard Co., 182 F.3d 1298, 1309 (Fed. Cir. 1999) (“[C]onsultation of extrinsic

evidence is particularly appropriate to ensure that [the court’s] understanding of

the technical aspects of the patent is not entirely at variance with the

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understanding of one skilled in the art.”); Vitronics, 90 F.3d at 1582. Dictionaries

may also help interpret claim language. See, e.g., Tex. Digital Sys., Inc. v.

Telegenix, Inc., 308 F.3d 1193, 1202 (Fed. Cir. 2002).

III.

The district court, as noted earlier, construed “the terms of the patent

claims as calling for a hardware unit or subunit that converts stack-based

instructions into the register-based instructions prior to the processing of those

instructions by the processor in the so-called ‘decode stage.’” The trial court

explained this construction in one paragraph of a terse seven-page order:

In so [construing], the Court is not reading into the claims a
limitation from the specification. Rather, the court is construing the
patent, as it must, in light of the specification. Both the specification
and the prosecution history reveal that the prior art – picoJava and
other specialized Java processors – implement a hardware solution
for processing Java bytecodes. It follows necessarily that the
claims of the patent, to be valid, must reach a different type of
hardware solution, and that the solution of the prior art does not
infringe.

Nazomi, slip op. at 6 (emphasis in original).

In thus focusing on validity, this limited approach glosses over, if it does

not ignore entirely, the intrinsic evidence -- the claims, specification, and

prosecution history -- that must inform the court’s claim construction. It is an old

axiom that patents “are to receive a liberal construction, and under the fair

application of the rule, ut res magis valeat quam pereat, are, if practicable, to be

so interpreted as to uphold and not to destroy the right of the inventor,” Turrill v.

Mich. S. & N. Ind. R.R., 68 U.S. 491, 510 (1863) (emphasis added). However,

the phrase “if practicable” cannot be ignored, and courts should not rewrite

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claims to preserve validity. See, e.g., Rhine v. Casio, Inc., 183 F.3d 1342,

1345 (Fed. Cir. 1999). (“[I]f the only claim construction that is consistent with the

claim’s language and the written description renders the claim invalid, then the

axiom does not apply and the claim is simply invalid.”). In sum, it is essential to

understand the claims before their breadth is limited for purposes of preserving

validity. Otherwise the construing court has put the validity cart before the claim

construction horse.

As briefed by the parties, the only claim term disputed both below and on

appeal is “instruction.” Nazomi’s definition of this term, “a command that

specifies or causes an operation or function to be performed,” is broad. This

proposed construction does not constrain the format of the command, the

location of the command within a program sequence, or the type of unit, subunit,

or component of hardware that uses the “instruction.” ARM’s proposed definition,

“a pattern of bits . . . in binary code . . . an element of instruction set

architecture . . . that the particular processor can recognize at its external input

and decode,” specifies the type of code, the context of the instruction within a full

set of instructions (“architecture”), the need to input the instruction into a

processor at an “external input,” and a requirement for processor decoding. To

ARM, the instructions are input to a decoder and the output of the decoder is

“control signals,” which “actually cause the physical execution of each

instruction.”

To reach a proper construction, the district court must look first to the

claims, the specification, and the prosecution history, and if further guidance is

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needed, to extrinsic evidence, such as dictionaries and expert opinions. The trial

court should use the term’s “ordinary and accustomed” meaning to one of

ordinary skill in the art as a touchstone for meaning. Thus, the district court must

determine what “instruction” means to one of ordinary skill in the art, and then

must determine whether the specification indicates that the patentee meant a

different definition. See, e.g., Moba, 325 F.3d at 1315 (“[T]he best indicator of

claim meaning is its usage in context as understood by one of skill in the art at

the time of invention.”); Tex. Digital, 308 F.3d at 1204.

In this patent, it appears that the inventor defined “instructions” in an

indirect manner. Specifically, the specification refers primarily to what the

instructions do and where they may do it. The court may search for either a

specific definition by the inventor or a disclaimer of a definition within the intrinsic

evidence, but the closest it may be able to come is that “generic instructions,

such as bytecodes, [] indicate the operation of a virtual machine.” ’215 patent,

col. 7, ll. 11-13. The trial court’s interpretation at least needs to account for this

statement.

The trial court may also wish to refer to the prior art references by Krall, et

al. and Dickol, et al. discussed by both the examiner and the inventor during

prosecution. These important prior art references may enlighten the meaning of

“instructions.” After all, the prior art is often a reliable source of the

understanding of one of ordinary skill in the art.

The trial court should also consider that possible embodiments of the

invention may throw light on the meaning of “instructions.” In so doing, however,

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the court may conclude that the scope of the various claims may differ, some

embracing different subject matter than is illustrated in the specific embodiments

in the specification. See, e.g., Va. Panel Corp. v. MAC Panel Co., 133 F.3d 860,

866 (Fed. Cir. 1997) (“[D]evice claims are not limited to devices which operate

precisely as the embodiments described in detail in the patent.”). For example,

independent claim 1 describes a central processing unit having a register file

adapted to execute register-based instructions and a hardware unit that converts

stack-based instructions into register-based instructions. Claim 1 does not

specify the physical relationship of the hardware unit to the CPU. Dependent

claim 3, on the other hand, narrows claim 1 by describing a version of the

invention in which the hardware unit is “outside of the central processing unit.”

The concept of claim differentiation “normally means that limitations stated

in dependent claims are not to be read into the independent claim from which

they depend.” Karlin Tech., Inc. v. Surgical Dynamics, Inc., 177 F.3d 968, 971-

72 (Fed. Cir. 1999); see also Innova/Pure Water, Inc. v. Safari Water Filtration

Sys. Inc., 381 F.3d 1111, 1123 (Fed. Cir. 2004). This guideline for claim

construction also suggests that the bounds of claim 3 differ from those of claim 1.

Claim 3 describes an embodiment that may correspond to Figures 1 and 3 of the

patent specification. Claim differentiation suggests that different embodiments,

reflecting the broader wording of claim 1, are also permissible. The court must

consider not only that different embodiments are possible, but also that the

meaning of “instruction” in the claims must be the same in all of them. Dayco

Prods., Inc. v. Total Containment, Inc., 329 F.3d 1358, 1371 (Fed. Cir. 2003) (“[I]f

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a claim term appears in more than one claim it should be construed the same in

each.”).

Many of the claims, and the specification, describe the instruction

conversion unit as included in the CPU and perhaps sharing some of its functions

with the CPU. The specification, at col. 3, ll. 35-41, permits incorporating the

hardware accelerator into a CPU. Correspondingly, claims 2, 30, and 37, and

related dependent claims, literally include the hardware unit in the CPU. Claims

39-70 state that the CPU “comprises” the hardware unit. “Comprising” is often

synonymous with “including.” Mars, Inc. v. H.J. Heinz Co., 377 F.3d 1369,

1375 (Fed. Cir. 2004). The specification, at col. 3, ll. 54-60, describes an

embodiment in which some bytecodes (instructions) are “processed” not by the

hardware accelerator, but by the CPU itself. In that case, both the hardware

accelerator and the CPU share the instruction conversion function. The invention

thus appears to enable many variations in the location and functions of the

hardware accelerator vis-à-vis the CPU. The meaning of “instruction” in the

claims must accommodate all of these specified variations, at a minimum.

The meaning of “instruction” must also be broad enough to encompass

the reasons for allowance of the ‘215 patent. In his reasons for allowance, the

examiner conceded that the prior art did not teach that the hardware unit “is

adapted to swap parts of the operand stack in and out of the register file from a

memory,” and “a[n] overflow or underflow produces an operand transfer between

the register file in the central processing unit and memory recited in the

independent claims,” and the performance of these functions in the context of

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the invention was essential for patentability. Therefore, it is especially important

that any construction of “instruction” must be consistent with these functions.

Finally, although both parties presented testimony on the meaning of

“instructions,” the district court provided no analysis of the level of ordinary skill in

this art nor the likely understanding of “instruction” to the artisan who had such

skill at the time of the patent application. This court, in this instance, simply has

very little to review without some reasoning on these points as well.

ARM, the appellee here, appears to recognize the shortcomings of the

district court’s analysis, but goes too far in arguing that “[b]ecause this Court

reviews both claim construction and summary judgment rulings de novo, it does

not matter for this appeal how the district court might have articulated the issues

of claim construction and noninfringement.” Appellee’s Brief at 26. Although this

court indeed reviews a district court’s claim construction without deference,

Cybor Corp., 138 F.3d at 1456, ARM cannot baldly assert that the district court’s

articulation of its claim construction reasoning “does not matter.” In reviewing a

district court’s claim construction, this court takes into account the views of the

trial judge, as well as the record of the trial, which helped that judge to

understand the terms of the claim. Though we review those views and that

record “de novo,” “common sense dictates that the trial judge’s view will carry

weight.” Id. at 1462 (Plager, J., concurring).

This court’s review of a district court’s claim construction, albeit without

deference, nonetheless is not an independent analysis in the first instance.

Moreover, in order to perform such a review, this court must be furnished

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“sufficient findings and reasoning to permit meaningful appellate scrutiny.”

Gechter v. Davidson, 116 F.3d 1454, 1458 (Fed. Cir. 1997). This requirement for

sufficient reasoning applies with equal force to issues of law, such as claim

construction, and issues of fact, such as infringement. Id.

This court rarely remands the issue of claim construction. See Gechter,

116 F.3d at 1459 (in an interference, remanding to the Board of Patent Appeals

and Interferences for lack of a claim construction analysis as well as conclusory

anticipation findings); Graco, Inc. v. Binks Mfg., 60 F.3d 785, 791 (Fed. Cir. 1995)

(“The entire omission of a claim construction analysis from the opinion, and the

conclusory factual findings on infringement, each provide an independent basis

for remand. Because insufficient findings preclude meaningful review by this

court, we remand.”). But see Optical Disc Corp. v. Del Mar Avionics, 208 F.3d

1324, 1334 (Fed. Cir. 2000) (declining to remand where the district court had

“inferentially set forth its view of the scope of the claims of the . . . patent”).

Unlike Gechter and Graco, where the records were devoid of any claim

construction analysis, the district court in this case provided some claim

construction analysis. Nonetheless this analysis is inadequate because it does

not supply the basis for its reasoning sufficient for a meaningful review.

This court must therefore remand for further claim construction and, as

indicated below, subsequent infringement analysis. In so doing, this court

cautions against the nonviable “practicing the prior art” defense that the district

court may have found appealing in reaching its result. See Baxter Healthcare

Corp. v. Spectramed, Inc., 49 F.3d 1575, 1583 (Fed.Cir.1995) (“Literal

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infringement exists if each of the limitations of the asserted claim(s) read on, that

is, are found in, the accused device. Questions of obviousness [or anticipation] in

light of the prior art go to validity of the claims, not to whether an accused device

infringes.”).

IV.

In its infringement analysis the district court was, if anything, more curt

than in its claim construction:

Plaintiff has articulated arguments as to why Jazelle could be seen
to infringe the claims of the ’215 patent in the sense that Plaintiff
believes those claims should be understood. Plaintiff has not
shown, however, how picoJava or other specialized Java
processors would not also infringe under such an interpretation of
the claims. The Court therefore concludes that Revision 3 does not
infringe the ’215 patent either literally or under the doctrine of
equivalents, and that no reasonable trier of fact could find to the
contrary.

Nazomi, slip op. at 6-7.

This “infringement analysis” is circular, based upon an interpretation that

strives to preserve validity. The scope of the claim invariably affects its

relationship to prior art, but courts are not in a posture to alter the claim scope

and thus those relationships. Thus, this court struggles to grasp the trial court’s

analysis. Moreover, under this court’s holdings in Graco and Gechter, supra, the

absence of findings of fact on the nature of the accused device makes appellate

review of infringement fruitless. Even under the trial court’s underdeveloped

claim construction, this court has no basis to determine that Jazelle converts

stack-based instructions into register-based instructions “prior to the processor in

the so-called ‘decode stage.’” Understanding the accused device is essential

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because once the claims are construed, infringement is assessed by comparing

the accused device to the claims, and the accused device infringes if it

incorporates every limitation of a claim, either literally or under the doctrine of

equivalents. See, e.g., Deering Precision Instruments, L.L.C. v. Vector Distrib.

Sys., Inc., 347 F.3d 1314, 1324 (Fed. Cir. 2003).

Because the court construed the claims differently than both Nazomi and

ARM, the record on appeal contains no testimony by any expert or other

indications that ARM’s product includes each feature of the construed claims.

Without such record evidence, this court cannot tell whether a dispute of material

fact bars a finding of infringement on summary judgment. A proper claim

construction in this case might benefit from testimony or other evidence to

disclose the subtleties of the many claimed variations of the invention. This

testimony should assist the court in resolving the relationship that ARM alleges to

exist between “instructions” and what ARM calls “control signals.”

The trial court on remand will also have the opportunity to examine the

way the ARM product performs the process of instruction translation, including a

specific comparison of that product with the process in the claims. Then, on

appeal, this court will have the benefit of a complete analysis of the accused

product, an analysis not evident in the current record.

This court notes that Mr. Patel, one of the inventors named on the ‘215

patent asserts that he “largely agree[s]” with Mr. Steele, who is ARM’s Java

program manager, as to how the ARM product operates. Mr. Steele, for his part,

presents only a very high-level block diagram of the ARM product and asserts

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that the product does not infringe, primarily because it translates Java

instructions into “control signals,” not ARM instructions. Because the ‘215 patent

claims the invention in diverse ways, the trial court on remand will have the

opportunity to require more than this superficial description of the operation of the

accused product. The trial court may find value, for example, in requesting a set

of competing infringement charts, not evident in the record before this court,

rather than the thousands of lines of unhelpful computer code. Such charts

would assist the court in its comparison of every element in the asserted claims

with the accused device.

Accordingly, this court vacates and remands to the district court for a

detailed analysis of the disputed claim construction, and for factual findings in

support of its noninfringement opinion.

COSTS

Each party shall bear its own costs.

VACATED and REMANDED

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